The use of configurable integrated circuits (“IC's”) has dramatically increased in recent years. One example of a configurable IC is a field programmable gate array (“FPGA”). An FPGA is a field programmable IC that has an internal array of logic circuits (also called logic blocks) that are connected together through numerous interconnect circuits (also called interconnects) and that are surrounded by input/output blocks. Like some other configurable IC's, the logic circuits and the interconnect circuits of an FPGA are configurable (i.e., they can be configured to perform different functions and operations by receiving different configuration data). One benefit of configurable IC's is that they can be uniformly mass produced and then subsequently configured to perform different operations.
One way of implementing FPGA's with circuits with other functionalities is to use a system on chip (“SoC”) approach. A SoC is an IC that includes all of the necessary hardware and electronic circuitry for a complete system. The SoC is typically a small piece of semiconducting material (e.g., silicon) on which several macroblocks are embedded. Some of these macroblocks can include a memory, a microprocessor, digital signal processor, etc. A characteristic of the SoC is that it requires all the macroblocks to be manufactured with one type of fabrication technology. This can be problematic since each macroblock may have a different optimal fabrication technology (e.g., a memory macroblock might be optimally manufactured at 90 nm, while an analog macroblock might be optimally manufactured at 180 nm). As such, in some instances, some of the macroblocks of a SoC might be manufactured sub-optimally. Another drawback of a SoC is that the design process is often extensive, cumbersome and expensive.
The SoC approach is one way of integrating the functionalities of several IC's. Another way of integrating the functionalities of several IC's is to use a System-in-Package (“SiP”) approach. The System-in-Package approach houses several IC dies in one package. This approach has several advantages over the SoC approach. For instance, the SiP approach does not require the design and layout of circuitry that implements some of the more common functionalities that are being integrated.
However, the SiP approach does suffer from the known “good-die” problem. It is known that most manufacturing processes do not always produce “good dies”. In other words, most manufacturing processes typically produce defective IC's (i.e., IC's that because of a manufacturing defect fail to perform operations for which they are designed). The term “manufacturing yield” is often used to express the percentage of IC's without defects that are produced in a particular manufacturing process. For example, a 95% manufacturing yield means that for every one hundred IC's that are produced, ninety-five IC's will be defect free, while five IC's will have a defect. The good-die problem is particularly troublesome in SiP's as one bad die in a SiP requires several other dies to be discarded.
Therefore, there is a need in the art for a better method of integrating the functionalities of several IC's, including a configurable IC. Ideally, such an approach will not suffer from the known good-die problem.